Integrated circuits incorporate complex electrical components formed in semiconductor material into a single circuit. Generally, an integrated circuit comprises a substrate upon which a variety of circuit components are formed. Integrated circuits are made in and/or on semiconductor material. Conduction in semiconductor material takes place by means of hole and electron flow. The resistance of semiconductor material can vary by many orders-of-magnitude depending on the concentration of impurities or dopants. Semiconductor material is used to make electrical devices that exploit its unique properties.
An inducting device is an electrical component that can be formed in an integrated circuit. Examples of inducting devices are simple inductors, symmetric inductors with or without center taps, transformers, baluns and the like. An inducting device has one or more conductive paths (or conductive turns) formed in a spiral or loop shape. In particular, the conductive turns are typically formed in a circular or polygonal shape. Moreover, the conductive turns may be formed in a single layer or in multiple layers. The conventional measure of an inductor's performance in an integrated circuit is called the Quality Factor or “Q.” Q is defined herein as generally the ratio of the maximum magnetic energy stored in the inductor divided by the energy dissipated by the inductor on each cycle. Two types of parasitics degrade Q in inductor devices formed in integrated circuits. They are parasitic capacitances and parasitic resistances. Accordingly, it is desired to reduce the parasitic capacitances and resistances to obtain a high Q spiral inductor. One method of reducing parasitic resistance is by introducing a patterned ground shield. In particular, if the semiconductor material is highly resistive it is not considered a lossy medium and a shield layer is not needed. However, a common semiconductor substrate is doped to have a resistance around 10-20 ohm-cm. A semiconductor substrate doped at this level tends to be very lossy. The use of a patterned ground shield in an inducting device having a substrate of this resistance reduces this loss. An example of a patterned ground shield is disclosed in the commonly assigned U.S. Pat. No. 5,717,243, which is herein incorporated by reference. Another example of an inductor with patterned ground shield that has both a reduced parasitic capacitance and a parasitic resistance is found in the commonly assigned U.S. patent application Ser. No. 10/039,200, now U.S. Pat. No. 6,635,949, which is also herein incorporated by reference. It is further desired to reduce parasitic resistance to improve the Q in an inductor device.
For the reasons stated above and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for inducting devices with reduced parasitic resistance.